1. Field of the Invention
The present invention relates generally to the measurement of semiconductor wafers and, more specifically, to a pattern recognition methodology implemented in a semiconductor wafer measurement station for removing station induced error from measured object characteristics.
2. Background of the Invention
During the many phases of the integrated circuit fabrication process, it is useful to know the surface characteristics of the semiconductor wafers, especially the bow and warp of the wafers. One of the most difficult aspect of the measurement is the separation of the station or fixture-induced errors from the measurement data. As disclosed in U.S. Pat. No. 4,750,141 (Judell et al.), fixture-induced errors can be removed by performing Fourier Transform on the measurements of a wafers at different orientations. The major disadvantages of the measurement method as disclosed in Judell et al are as follows:
1. Even with the use of the Fast Fourier-Transform (FFT) technique, FT is, nonetheless, a procedure that requires either computing trigonometric functions for each act of the calculation of the FT, or storing the computed Fourier basis in the memory, resulting in a larger flop count or larger memory requirements.
2. The noise reduction through computing a weighted average of two solutions requires taking additional measurement of the rotated wafer, and.
3. It does not provide means to compensate for the tilt that may occur because the wafer surface touching the chuck is not flat.
It is, therefore, desirable to provide a method for measuring the surface characteristics of a semiconductor wafer and removing the fixture, or station-induced errors from the measurement without using the Fourier-Transform methodology and taking additional measurement of the rotated wafer for noise reduction.